• Mentoring an undergraduate student alongside a colleague on their curricular internship in compiler-time NN approaches for CGRA mapping.
• Co-authoring a paper (06/2026) introducing a GNN-guided partitioning flow for Data-Flow Graphs onto CGRAs: ~30% reduction in edge cuts, 98% mapping success rate, ~50× speedup over exact SAT solvers.
• Guided the intern in combining deterministic algorithms with learned heuristics for an NP-hard mapping problem.

• Assessed viability of converting ONNX models to C via ONNX2C and profiled compute-heavy nodes in the output.
• Selected bottleneck nodes for hardware acceleration on XHeep/RISC-V and evaluated combined SW + accelerated results.

• Developed an API for LNS data formats with custom RISC-V instruction compilation and simulation-based types for arithmetic, comparisons and conversions between LNS and BFloat/Float.
• Validated the API against Float and BFloat on a small transformer-based LLM and extended the LNSU in RISC++ with new comparison and conversion instructions.

• Deployed a Logarithmic Number System Unit (LNSU) to a RISC-V CPU via HLS in C++, with add/sub approximations using only 192 bytes of lookup tables combined.
• Integrated fully into the RISC-V pipeline and tested on FPGA at 125 MHz maximum throughput.

Implemented a C interpreter for Lambda Calculus compiled to SK Combinators, combining both theories to build translating and reducing functions over a custom program tree.

• Co-developed and maintain a full-stack platform to manage events, members, instruments and organizational workflow for a student musical group, automating previously manual processes.
• Informally act as technical lead: managing a team of 8 student contributors, handling onboarding, development workflow and all networking and self-hosting infrastructure with Cloudflare Tunnel.

• Designed a 16-bit LNSU for the RISC++ core achieving up to 45% fewer LUTs, 58% fewer DSPs and 29–36% higher clock frequencies vs. IEEE-754 FPU on a Zynq-7020 FPGA.
• 95.99% MNIST accuracy with direct FP32-to-LNS16 conversion and no retraining. Co-authored with Guilherme de Oliveira, José Paradela, Luís Miguel Sousa and Nuno Paulino.